DMA issue on pynq RFSoC Board

vrb · May 27, 2025, 11:02am

I’m trying to run RFDC code using JupyterLab, based on a similar design provided on the PYNQ GitHub repository.

However, while executing the third cell, there was no response from JupyterLab, it kept running continuously. Could you please guide how to fix DMA issue.

marioruiz · May 27, 2025, 6:43pm

Hi @vrb,

Is this your own overlay?
It would appear that the DMA interrupt is not connected in your hardware desing hence the system never finished.

vrb · May 28, 2025, 4:51am

Yes this is custom overlay. The DMA interrupt is also connected.

marioruiz · May 28, 2025, 10:35am

Can you please share a screenshot of the block design?
Have you also verified TLAST and TKEEP in the IP involved?

vrb · May 28, 2025, 10:53am

we checked this one, but Halted,DMAIntErr, Err_Irq were equal to 0.

Our design is similar to the design which was provided in github repository.

marioruiz · May 28, 2025, 11:05am

Can you share the screenshot of the overall design, were we can see the irq connected

vrb · May 28, 2025, 11:27am

marioruiz · May 28, 2025, 12:13pm

is the packet generator setting the TLAST, is that propagated through the clock converter?

vrb · May 28, 2025, 12:25pm

Yes

marioruiz · May 28, 2025, 5:02pm

tkeep is missing, this could be the issue.

vrb · May 29, 2025, 1:55pm

Hi @marioruiz

Will tkeep also cause an AttributeError: ‘NoneType’ object has no attribute ‘transfer’ ?

marioruiz · May 29, 2025, 2:19pm

Hi @vrb,

I do not think your design has a sendchannel, that’s why you are getting the NoneType error.
From your block design, only the recvchannel is present.

vrb · May 30, 2025, 6:35am

Hi @marioruiz ,

We took this design from the RFSoC PYNQ GitHub repository. Could you please tell us which design we should refer to in order to validate the RFDC on PYNQ?

marioruiz · May 30, 2025, 7:29am

Did you change anything? if so, what did you change? The base overlay is a good starting point.

vrb · May 30, 2025, 10:35am

Yes, we removed the remaining interfaces and kept only the radio hierarchy.

vrb · July 7, 2025, 10:34am

Hi @marioruiz , how should I validate ADC and DAC using pynq? Do you have any example design to suggest.

marioruiz · July 7, 2025, 3:58pm

Hi @vrb,

You can use the spectrum analyzer for this.

Mario

vrb · September 1, 2025, 2:13pm

Hi @marioruiz

github.com/Xilinx/RFSoC-PYNQ

boards/RFSoC4x2/base/notebooks/rfdc/01_rf_dataconverter_introduction.ipynb

master

{
 "cells": [
  {
   "cell_type": "markdown",
   "metadata": {},
   "source": [
    "# RF Data Converter Introduction\n",
    "----\n",
    "\n",
    "<div class=\"alert alert-box alert-info\">\n",
    "Please use Jupyter labs http://board_ip_address/lab for this notebook.\n",
    "</div>\n",
    "\n",
    "This notebook presents an introduction to the RF Data\n",
    "Converters (RF DCs) on the RFSoC4x2 board.\n",
    "\n",
    "## Aims\n",
    "* Describe the `xrfdc` Python package that is required to control and\n",
    "  configure the RF DCs from Jupyter\n",
    "* Investigate the radio hierarchy in the base overlay, allowing the\n",

This file has been truncated. show original

How can I validate rfdc converters in ZCU111 and custom board? Which overlay should I use for this?

vrb · September 4, 2025, 4:44am

Hi @marioruiz , While trying to transfer it throws DMA channel not halted error. Can you please help me out with this ?

marioruiz · September 4, 2025, 7:00am

Hi @vrb,

I wrote a comprehensive debug blog to identify and fix these issues.

Mario

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DMA issue on pynq RFSoC Board

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