Getting IP from ZCU111 RF Data Converter Example

I created the bitstream for the data converter example described here:
https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/57573648/Non-MTS+Design+8x8

In Vivado 2018.3, I created the project in the tcl prompt:

cd pl/NON-MTSDesign_8x8
source scripts/create_project.tcl

and then build the bitstream in Vivado.

I copy the .bit and .hwh files to the ZCU111 board, renaming them NON_MTSDesign_8x8.bit and .hwh.

The attached notebook shows my attempts to get the IP from the bitfile using pynq. In particular, getting the IP for ‘adc_dma_block/axi_dma_1’ raises an error in the pynq library dma.py showing that it has trouble finding an entry for ‘phys_addr’:

dma = getattr(soc,‘adc_dma_block/axi_dma_1’)

raises the error on this line (seems that name is set to ‘’)

self.mmio = MMIO(PL.ip_dict[name][‘phys_addr’], 32)

There seems to be a physical address defined for this IP:

adcDmaBlock = soc.adc_dma_block
print(“phys_addr = %X”%adcDmaBlock.description[‘ip’][‘axi_dma_1’][‘phys_addr’])

yields

phys_addr = B000A000

The .bit and .hwh files are here: https://drive.google.com/drive/folders/1GaMEEZhuTRlestzWLb0_b8rTOj4UKTu_?usp=sharing

non-mts-get-adc-dma.ipynb (15.0 KB)

I should have mentioned that this is with pynq version 2.5

I checked the error message and it looks like it has been generated from the interrupts. Can you try

dma = soc.adc_dma_block.axi_dma_1

Also, a block diagram would be helpful.

Otherwise PYNQ 2.5 is working with xilinx tools 2019.1 and after, so this could be the HWH parsing or handing is not correct.

Thank you for the suggestion. It raises the same error.

I added the .bd file to the google drive area:
https://drive.google.com/drive/folders/1GaMEEZhuTRlestzWLb0_b8rTOj4UKTu_?usp=sharing

I am building the 2019.2 version now.

The 2019.2 version has the same issue.

The notbook, .bit, .hwh files, along with the .bd file, are all here:

https://drive.google.com/drive/folders/1dKQkIjW8WA5zeiui8RClKk4kYGBqWV1_?usp=sharing

With both version, this syntax also raises the error.

dma = soc.adc_dma_block.axi_dma_1

Thank you for looking at this.

Can you paste a screenshot of the block design? It would be easier to see.

Thank you. Here is a pdf of the design. Does this have enough resolution for you to zoom in? Please let me know if another view would be more helpful.

zcu111_rfsoc_trd_axi.pdf (491.5 KB)

It looks like you used scatter-gather (SG) DMA, which is not well-supported by pynq library (only simple DMA is officially supported):

If you want to test SG out, there is a pending pull request on our github (#1056) which has a modified version of dma.py. However, we have not tested it yet so you may still see some issues there.

Thank you, that makes sense. I’d like to get that version. I’m not sure how to get files for that specific pull request. Do I need just that one .py file, or more, and do I need to recompile? What do you suggest?

Thank you.

Hi!

I’m developing with the RFSoC ZCU111 and your project would be of great help for me but the .bit and .hwh files are no longer in Drive folder now.

Can you please share them again?