I want to ask you if it is possible to use a GPIO to enable or disable the DAC signal. I haven’t used GPIO inputs/outputs but I think there will be people on the forum who know how to use them.
I had thought about using an AXI GPIO 2.0 block in which to write a ‘1’ or a ‘0’ from PYNQ to send the correct signal to the RF Data Converter in case you want to have the DAC on or all 0s in case you want to disable the signal.
Can anyone give me some advice on how to achieve my purpose?
Thank you all very much for your time.
[I am using a ZCU208 board with PYNQ version 3.0.1.]
No, you can’t insert a mux after the DAC outputs.
The DAC outputs of the RFDC IP are physical wires from the RFDC IP and are not configurable.
This can be confusing in Vivado IPI. One side of that IP is effectively connected to the PL and you have more control over what connects to it. The other side connects directly to the physical interface. (This is similar for example to the DRAM outputs from the PS).
The RFDC doesn’t have an enable/disable pin as such. The IP has control registers. Depending on what you need, you could also use the (PYNQ) API to shutdown and startup a tile. You could also reset the whole block.
The IP also has “Real-Time Signal Interface Ports for RF-DACs” and 3 pins for controlling shutdown of each DAC. You should be able to connect GPIO to these pins to give you control.
Would this give you what you need?
No offence but I don’t think the original poster is considering what you had described.
Any RF DAC or simple DAC in digital world can done this easily using a DATA MASKING idea to kill the RF output.
Let me make sure you understand kill meaning:
Kill the output doesn’t mean the carrier tone is also turned off.
You can kill the signal via a AND logic on the data stream, so once you think you need to cut-off the DAC of the RF output AKA masking the data streaming from signal to all ZERO of the digital DAC input bus.
Such method can be achieved easily and very simple.
Or if you would like a better solution a much better solution is just attached a digital controlled attenuator to the output of the RF via IIC or more simply H-L control pin.
Example Like HMC274.
A -40dB can easily kill all near sensing device to see the signal usefully.
First of all, thank you for your time and your replies.
Indeed, according to @briansune my query is more related to what he describes. However, I don’t know how to correctly realize that MUX managed by a GPIO since in the tests I have done I don’t seem to be able to change the GPIO value.
On the other hand, @cathalmccabe answer has also helped me since there is the possibility to perform a power off/on of each of the DAC Tiles, so it could be worth as an approximate solution to what I needed.
I do not have any RFSOC board on hand but from the short video the AXI-STREAM is what the data is passed to the RF-IP.
So a AXI-Stream simple masking Verilog / VHDL can easily turn the data into zero and only the carrier tone is remained.
Remember digital IQ DAC / ADC only care what information is inserted to.
Alignment phase IQ all tedious stuffs are mostly done by IP configuration and silicon design.
Such as filtering after/before (de)modulation, interested bandwidth or possible spurious performance are all fixed unless external hardware designs are involved.