There are multiple clocks used inside a Zynq devices and a lot of flexibility for how you can set these.
Fundamentally there is an external clock that other clocks are derived from in some way. The speed of this external clock will determine some of the internal frequencies you can select (that can be generated).
For example, when you request 18MHz by setting fclk, it may not be possible to generate this frequency. In this case, PYNQ will set the clock to the nearest frequency, 12MHz in your case.
If you are not sure what settings are valid, if you check the block diagram in Vivado and try changing some of the values for clocks you should start to see differences between the request clock and the actual clock.
For example; some made up numbers: notice the difference between Requested, and Actual.
Also note the “Input Frequency” at the top - this is the external input.