How to compile custom overlay with integrated DPU on pynq

Support
1

Hi dear PYNQ community,

I have to integrate Xilinx DPU ip core into an exisiting vivado overlay(a system for some signal processing), which means: I have to first integrate the dpu into an exisiting blockdiagram in vivado(already solved), and then run such system with DPU in pynq and jupyter-notebook environment for later work. What is the general process of such requirement?

Since Pynq-dpu offers the bitsteam with reference dpu layout only, and vivado DPU workflow requires petalinux bootimage ( i am not so sure if installing pynq on petalinux is a good idea.), i am completely lost of ideas. Could anyone give me some insights about the workflow?

P.S: The reason that i could not directly use vivado to compile and generate the bitstream for such system is: the vivado will not generate .xclbin file, which is essential for pynq-dpu package to load with DpuOverlay(“custom_overlay.bit”). Also the vitis-AI can only offer DPU overlay with custom setup, which is not what I looking for. I need an Overlay with DPU ip core included to work wtih exisiting signal processing system.

Thank you so much in advance !!

Current environment

  • PYNQ 3.5 and ZYNQ-ZU board from TUL or ZCU104
2

Hey @tallgeeze , did you solve this problem already? I am also facing the similar issue ! If possible, can we discuss it in details?

3

Now we are 3 with the same issues. I’ve got some ideas of how to generate the bitstreams. The thing is that I cannot load it to the DpuOverlay without errors.
Here are 2 sources, I am not sure which will be a better option for this
[AMD Technical Information Portal](AMD PG338)
https://www.fpga-radar.com/vivado-hw-dpu

4

Hello @Poulami @chim20air. Thank you for asking.
Basically, to integrate DPU ip core in self-built custom overlay could be concluded as a vivado workflow of vitis-ai. Please refer to these link: Creating a DPU-Compatible Platform for PYNQ - MakarenaLabs
and : Vitis-Tutorials/Vitis_Platform_Creation/Design_Tutorials/02-Edge-AI-ZCU104/step1.md at 2024.2 · Xilinx/Vitis-Tutorials · GitHub

As well the DPU-PYNQ official github would provide you a makefile to build dpu-contained overlay on a vitis-platform.

Such a workflow turns out to be the easiest way to deploy dpu in PYNQ environment.

GLHF

5

Question, Are you using SV/verilog/VHDL code? or are you using HLS?