Hi all!
In this tutorial, we will show how to create a custom hardware design with Xilinx’s DPU IP provided in the Vitis AI toolchain. Specifically, you can use this approach with any custom design which is Vivado compatible, and you can extend it to infer AI models.
Enrico Giordano MakarenaLabs
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Good tutorial, thanks for sharing!
Can we access PYNQ DPU by a non-github repository?
What do you mean exactly? Do you have a problem accessing GitHub in general, or is it a problem accessing GitHub from the board?
You can download a zipped copy of a GitHub repository and copy to the board if that is the issue.
Cathal
Hi,
I was having some problem accessing github via terminal. I was able to solve this issue by download the zip file as you suggested.
2 Likes
Hello, great project, Thank you for sharing.
Could you share the clock configuration for that design? I am getting confused about that. And also, you put several constants there. Could you share the detail?
Moreover, the configuration inside the DPU IP core, could you also share it?
Thanks in advance.
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