PYNQ: PYTHON PRODUCTIVITY

How to use partial reconfiguration in PYNQ-Z2?

Hi, I’m new in the field of FPGA. Recently, I need to use the partial reconfiguration technology in PYNQ-Z2, but after a long time of searching, I failed to find a detailed tutorial.

I really need to find a detailed tutorial teaching me how to use the partial reconfiguration technology in PYNQ-Z2 using Verilog (not HLS), from the scratch.

Could anyone be so kind to help me with that? Thanks a lot!

1 Like

Hi @Ronin,

This is not a PYNQ related question. You may better off asking in the Xilinx support forums. https://support.xilinx.com/s/?language=en_US

The key word is Dynamic Function eXchange (DFX), partial reconfiguration is a legacy term.

Once you have the partial bitstreams you can use PYNQ capabilities to program them onto the FPGA

https://pynq.readthedocs.io/en/latest/overlay_design_methodology/partial_reconfiguration.html

Mario

1 Like

Hi @marioruiz ,
Thanks a lot for your answer!
I will try your suggestion.