I am currently trying to program the zynq on Pynq-Z2 via JTAG with the pins available on JP3 and a Xilinx platform USB cable.
In vivado labs I am able to connect correctly to the zynq via auto connect, but when I try to program the device using my bitstream I get the following error :
[Labtools 27-3165] End of startup status: LOW
Which as I understood means that the DONE pin R11 does not go high at the end, and that the zynq is not programmed. I am not using or redefining the R11 pin in my design to my knowledge.
Can somebody help me to solve this error in order to be able to program the zynq via JTAG please ?
Yes, I’ve just tested this and it is fine for me.
I have a Digilent USB-JTAG and a Xilinx Platform Cable USB II (red box).
TO connect the programmer to the board, I was using a header on one side, and fly wires on the other side. (Header plugs in to either programmer, wires to the pins on the board.)
I don’t remember if the header came with the Xilinx programmer or DIgilent, but I notice the ground on the header was in the wrong place for the Xilinx red box (no green light on programmer). I used another wire to connect to ground and it worked OK.
Jumper is also set to JTAG, so board doesn’t boot from SD.
I finaly found the issue. I was wrongly using the XVREF from the pynq Z2 board as VREF on the Platform cable.
I’m using now the 3.3V on the board as VREF and it works fine.