Multiple DMA: stall!

Hi @alienflip,

Welcome to our community. As you are using the tools 2022.1, the HLS compiler is Vitis HLS not Vivado HLS.

Vitis HLS does not generate AXI4-Stream from structure properly. To generate AXI4-Stream interfaces you need to use something like this hls::stream< ap_axis<32,0,0,0>.

You can review Cathal’s tutorial for more information.


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