Operate on 2D-Array

Hey again all :slight_smile:

I am using PYNQ-Z2 v2.7, with Vivado/Vitis 2022.1.

Currently trying to do something on a 2d array - the pseudo code would be:

for(int ix = 0; ix < size; ix++){
    for(int iy = 0; iy < size; iy++){
        if(ix + iy % 2 == 0){
            OUTPUT[ix][iy] = INPUT[iy][ix];
        }
        else{
            OUTPUT[ix][iy] = 0;
        }
    }
}

Ideally, the notebook would look like this:

import time, random, numpy
from pynq import Overlay, allocate
import pynq.lib.dma

ol = Overlay('./design_1.bit')
ol.download()

dma0 = ol.axi_dma_0
dma1 = ol.axi_dma_1

arr = numpy.random.randint(10, size=(128,128))
zeros = numpy.zeros(arr.shape, dtype=int)

in_buffer = allocate(shape=arr.shape, dtype=numpy.int32) 
out = allocate(shape=zeros.shape, dtype=numpy.int32) 

numpy.copyto(in_buffer, arr)
numpy.copyto(out, zeros)

t_start = time.time()
dma0.sendchannel.transfer(in_buffer)
dma0.recvchannel.transfer(out)
dma0.sendchannel.wait()
dma0.recvchannel.wait()
t_stop = time.time()

in_buffer.close()
out.close()

print("Hardware execution speed: ", t_stop - t_start)
print("Array out: ", out)

I am just wondering how to go about reading the buffer here from hls? How would we go about dereferencing particular elements?

I noticed this post mentions HLS ARRAY_PARTITION and HLS PIPELINE … is there some inbuilt hls FPGA functionality here already for array handling?

Could someone help demystify the pragmas?!

I also looked at the vitis examples, but they dont reference hls:stream … maybe the idea is to combine the approaches?

… anyhow …

Thanks!

:slight_smile:

Hi @alienflip,

This is not really a PYNQ question. However, there are many posts with similar questions.

Please check out these tutorials

Mario

Ah, ok … where best to ask questions about the pragmas?

In the Xilinx forums https://support.xilinx.com/s/topic/0TO2E000000YKXtWAO/hls?language=en_US

1 Like

Can follow here