Hope you all ENJOY~
Due to lots of users and developers are not familiar the differences between diamond zip and block-based PR design before 2022.x Vivado.
I am going to explain and make a follow up tutorial:
The MAJOR different of block and pure RTL designs:
Block based design cannot use BDC ← so you can only use tcl command to run the reconfiguration flow and general Vivado run processes is good up to synthesis, afterward manual tcl command for implementations and bit generation.
I am enclosing a TCL all-in-one project create and bit generation script here:
Make sure to edit the path accordingly!!
All you need is open vivado and cd to the project folder you plan to setup.
As for the ZYNQ block preset info you can prepare in other project and renamed as base_overlay_dfx.tcl
After execute the TCL script, there will be couples of bit files. Just follow the final parts of the 1st tutorial and you can try out how PR can be done in PYNQ + Vivado TCL.
XDC is just for constraining the I/O of the FPGA you are using, this means it will be differ from users. So there are no points to share out when it is just trying to map to LEDs and also this is a very good point for user to double check if the FPGA series they had select is correct when 900 BGA vs 400BGA, some IO might not even exist.
Meanwhile, I forgot if there are any external oscillator is used in this example. If no then the timing constrains are not even critical.
So I cannot see why top.xdc will be a big problem. As long as you understand what that file really try to do.
Can you tell why you have used xlconcate and slice here and how GPIO width changes
like in my one of design for partial reconfiguration I used GPIO of 1 bit width and there was no slice used still it was working fine in vivado 2019.1 pynq v2.6/2.7
Well I don’t think this is a good question as you had said 1 bit gpio so the decouple only require LSb and if your script is just controlling LSb then of cause it will work perfectly.
Can’t see this is related to PYNQ version nor the Slice block. As the script I guess is controlling the correct pin accordingly.
Sorry for any confusion I am just asking why you have choose GPIO width as 2 bit as it is working fine with 1 bit. Also I am new to using DFX so please bear my silly question.
Okay now I see what you are trying to ask.
The reason is because the handshaking protocol is completed and proper in such way.
You wait the decoupling complete before you decouple again and wait the decoupling finish after reconfig.
See the image more detailly.
Of cause you can done in your way because the wait is long enough for the next decoupling. But you can tell for sure things will not mess up in that way.
