Smartcam with pynq : stall at memory access

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Pynq 3.0.1, Kria kv260, Vivado 2023.2.1
I’m implementing smartcam app hardware but with pynq but the kria stalls at two points:

  • if i’m using v_frmbuf_wr as the original design, -I can’t use register_map- the board stucks when i run this line :

my_ip.mmio.write(0x00,0x1)

  • if i replace v_frmbuf_wr with vdma the kria stops working at:

my_ip.register_map

(by stall I mean that the board hangs, ssh terminates, jupyter notebook loses connection and i have to reset the board)

Edits I made on the block diagram:

  • connected clk_wiz locked to reset blocks dcm_locked
  • made memory-mapped ports on the ps 64-bit wide
  • added AXI interrupt controller

with VDMA

image
image1611×602 50.4 KB

jupyter notebook code:

from pynq import Overlay, MMIO, Clocks, PL
from kv260 import BaseOverlay

PL.reset()

ol = Overlay(“./kv260_ispMipiRx_vcu_DP_wrapper.bit”) #together with hwh i get from vivado
ol.is_loaded()

Clocks.fclk0_mhz #returns 66.66 but i input 100 so it becomes 99.99
ol.ip_dict

my_ip = ol.capture_pipeline.v_frmbuf_wr_0 #if i used vfrmbuf_wr
my_ip = ol.capture_pipeline.axi_vdma_0 #if i used vdma
print(my_ip.register_map) # when vdma: kria stalls here

base_address = 0xB0010000
mmio = MMIO(base_address, 0x1FFFF)
mmio.write(0x00,1) #this also stalls for frmbuf_wr

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