Hello, I’m trying to design an IP in Vitis HLS 2022.1. In an older design of the same IP, the TKEEP signal was ffff, and the DMA transfer was working properly. However, in an updated design, the TKEEP signal is 0000, and the DMA transfer is not working.
Old HLS Code and ILA:
The IP in question is pgen_0
pgen.h:
pgen.cpp:
pgen_tb.cpp:
ILA:
Now this is the new HLS Code:
pgen.h:
pgen.cpp:
pgen_tb.cpp:
And this is the new ILA:
The tkeep signal is now 0000. Can you please help me out with suitable changes in the HLS code for proper generation of tkeep?
Hi @Riya_Sachdeva,
You should explicitly specify the value of KEEP.
You can do
local_stream_re_out.keep = -1; // this sets every bit to 1
local_stream_im_out.keep = -1;
I would suggest you use code snippets instead of images, it is easier to search and copy paste
Mario
Hello, yeah I was able to resolve this.
if (enable)
{
ap_uint<32> start = (count - packetsize);
ap_uint<32> end = start + packetsize;
for (ap_uint<32> i = start; i < end; i++)
{
local_stream_re_out.data = buffer_re[(i%buffer_size)];
local_stream_im_out.data = buffer_im[(i%buffer_size)];
local_stream_re_out.keep = 65535; //ffff
local_stream_im_out.keep = 65535; //ffff
local_stream_re_out.last = (i == end - 1) ? 1 : 0;
local_stream_im_out.last = (i == end - 1) ? 1 : 0;
output_re.write(local_stream_re_out);
output_im.write(local_stream_im_out);
}
}
But using tkeep = -1 looks like a better approach, since it will work even for different number of bits. Thank you so much!
1 Like
Great, please mark the post as solved if the issue is resolved.
