I am struggling to get ultra96v2 working with pynq, further than juppyter-written examples. So I am using Vitis and implementing a simple vector-addition example, all using 2020.2 at the moment (was at 2020.1 and moved to bypass some errors on ultra96v2 base scripts from Avnet).
I have completed and tested the zcu104 flow, by creating a custom petalinux project, importing pynq overlay and python3 dependencies. Then moved to Vitis and implemented an HLS example of vector-addition. Test was passed and everything is fine, I can pass different values get different results using numpy and setItem .
When I move to Ultra96V2 and do the same flow, I get errors when loading the Overlay in python3.
When I load the .xclbin I am facing “No hwh or tcl file found” (where zcu104 doesn’t need at all this file, probably is already loaded?? don’t know). Here is the error:
"
Traceback (most recent call last):
*** File “test2.py”, line 9, in ***
*** ol = Overlay('/media/sd-[ 735.662140] [drm] Pid 1697 closed device***
mmcblk0p1/xsa_files/krnl_vadd.xclbin’)
*** File “/usr/lib/python3.7/site-packages/pynq/overlay.py”, line 330, in init***
*** self.parser = self.device.get_bitfile_metadata(self.bitfile_name)***
*** File “/usr/lib/python3.7/site-packages/pynq/pl_server/device.py”, line 645, in get_bitfile_metadata***
*** bitfile_name))***
ValueError: Cannot find HWH or TCL file for /media/sd-mmcblk0p1/xsa_files/krnl_vadd.xclbin.
"
When I am trying to load the .bit file I am facing a header error reading on bit file.
I am using something similar to this https://www.element14.com/community/groups/fpga-group/blog/2020/05/01/petalinux-git-howto but for 2020.2 version of all git repositories.
So I am wondering , has anyone succeeded to run a kernel from Vitis using pynq and Ultra96v2? Because for me I think this is the end of trials…
Thanks already,
Alexander