PYNQ: PYTHON PRODUCTIVITY FOR ZYNQ

ZCU104 Part Number for Custom HLS IP Core targeting PYNQ v2.4

I am trying to modify the PYNQ v2.4 base hardware design with a custom IP for video processing. Even with the passthrough I am getting weird noise that I think is a timing issue. I’m beginning to wonder if I have selected the proper part number in HLS since my Vivado 2018.3 doesn’t make the ZCU104 board file available (even tho the files exist in the Xilinx directory) so I am having to target by part number instead of board file. I have seen 3 different part numbers referenced in documentation:

XCZU7EV-2FFVC1156 - from the Xilinx Evaluation Kit page (https://www.xilinx.com/products/boards-and-kits/zcu104.html#hardware)

XCZU7EV-FFVC1156 2-e - from a related Xilinx forum post (https://forums.xilinx.com/t5/Vivado-High-Level-Synthesis-HLS/Cannot-add-zcu104-in-Vivado-HLS/td-p/888728)

xczu9eg-ffvb1156-2-i - is what the ZCU104_VideoDemo project IPs target at this github example (https://github.com/PeterOgden/ZCU104_VideoDemo/blob/master/ip/filter_pipeline/script.tcl)

Which part number is right? My video passthrough IP works when I use the same card and target other boards just not when I target the ZCU104. Thanks for any help!

The complete part number is xczu7ev-ffvc1156-2-e where the xczu7ev-ffvc1156 is the silicon design and -2-e are the speed and temperature grade.

For HLS purposes the part number is used to determine the device family and speed timings and all Zynq Ultrascale+ parts of the same family will get transformed the same way (hence why I didn’t pay too much attention when creating the VideoDemo design you referenced though I will fix that to avoid future confusion).

The main timing checks are done by Vivado at synthesis and implementation time so that should be your first place to check when diagnosing timing problems rather than Vivado HLS. Having the right part in Vivado HLS will make the job place-and-route pass of Vivado easier but won’t causing the timing analysis to give a false positive report.

Peter

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Thank you for your quick reply and for the information on the part numbers.

I’ll re-run synthesis and implementation and watch for any timing warnings (I never received errors since I can build a bitstream).