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Xrfclk configuration | LMK04828 | Using external 10MHz reference clock
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16
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1816
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March 10, 2025
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Kria PYNQ DMA connect problem
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3
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30
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March 10, 2025
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Device tree issues with PYNQ on Custom Board
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6
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1539
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March 7, 2025
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KR260 PYNQ ip calling problem
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5
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13
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March 7, 2025
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Incorrect PL Clocks on PYNQ-ZU board from TUL
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2
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30
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March 6, 2025
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Microzed PYNQ image does not boot
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0
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12
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March 5, 2025
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Kria-PYNQ DMA retrive always different results
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5
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20
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March 5, 2025
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PYNQ ZU pinout diagram
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2
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23
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March 4, 2025
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Why doesn’t the RFSoc 4x2 have a specified frequency range?
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1
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52
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March 4, 2025
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RFSoC 4x2 PLL Lock Leds don't turn on
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1
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40
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March 4, 2025
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PYNQ Z1 - max. PL PLL frequency?
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1
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24
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March 4, 2025
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What is constrain pin of the clock present on pynq-Zu board
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1
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12
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March 4, 2025
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Add an SDIO wifi kernel module while builing a new PYNQ image
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0
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15
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March 4, 2025
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Writing an image to an IP using AXI4 Master
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8
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131
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March 4, 2025
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Modifying 4x2 BaseOverlay seems to disable transmit?
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0
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14
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March 2, 2025
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Addressing PMODs in MicroZed boards running a PYNQ image
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4
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37
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March 2, 2025
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Axi dma peformance with different frequencies
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1
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104
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March 1, 2025
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RFSoC 4x2 OFDM channel estimation
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2
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56
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February 28, 2025
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CacheMetadataError ZCU102 PYNQ3.0.1 Vivado2022.1
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2
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15
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February 28, 2025
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Custom fs in mts overlay
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3
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33
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February 26, 2025
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My DMA send and receive keep stalling if i send multipple data
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3
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31
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February 26, 2025
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Want to implement bilateral filter in pynq z2
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0
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15
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February 25, 2025
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Pynq-Z2 mechanical dimensions
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2
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32
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February 22, 2025
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RFDC Start Up Fail - ADC 0 timed out at state 7 in XRFdc_WaitForRestartClr
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5
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310
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February 19, 2025
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AXI GPIO connection with my 4 bit counter
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3
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63
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February 19, 2025
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Pynq zu sysmon adc read
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0
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11
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February 18, 2025
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Adding btusb kernel module to PYNQ OS
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1
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264
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February 18, 2025
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Sudo modprobe btusb error
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0
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17
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February 18, 2025
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AXI Data FiFo not detect by PYNQ
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2
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12
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February 17, 2025
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Use AXI lite interface for setting parameter HLS IP
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5
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1043
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February 17, 2025
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