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Tutorial: using a HLS stream IP with DMA (Part 3: Using the HLS IP from PYNQ)
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4
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9320
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1
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144
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7
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7625
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0
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101
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3
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281
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6
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981
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August 8, 2024
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0
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141
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July 31, 2024
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10
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2697
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1
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1758
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16
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6117
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0
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750
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June 17, 2024
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Changing the IP in the Composable Pipeline
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19
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1364
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June 3, 2024
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PYNQ 3.0.1 for Zybo Z7-20
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2
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1274
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April 5, 2024
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PYNQ 2.7 DFX Partial Reconfiguration under Vivado 2020.2
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8
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2503
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April 3, 2024
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Tutorial: using a HLS stream IP with DMA (Part 2: Vivado design)
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4
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9972
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Tutorial: using a HLS stream IP with DMA (Part 1: HLS design)
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1
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19197
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March 22, 2024
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12
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14018
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2
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691
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February 1, 2024
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Interactive C++ on the Kria-SoM in Jupyter Lab
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3
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3012
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January 26, 2024
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Frequency modulation with RFSoC4x2
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0
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246
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November 27, 2023
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A simplified Device Identifier and Device DNA AXI read IP for PYNQ
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0
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494
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October 4, 2023
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Using ILA to debug IP
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3
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3956
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August 22, 2023
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RISC-V picorv32 processor porting to KV260 + PYNQ 3.0.1
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0
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307
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0
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588
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0
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642
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June 30, 2023
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Pynq with SmartSSD?
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0
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336
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1
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637
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0
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448
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May 31, 2023
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4
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979
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Build PYNQ-2.4 SD card Image for Zedboard v2018.3
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3
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5308
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