For those interested in recreating the image you can follow these stages.
1. Create the Board Support Package (BSP) (30 min approx.)
Although the Pynq-Z2 and the Zybo-Z7 have the same FPGA (i.e. xc7Z020-clg400), they present some differences. So, the following specifications should be considered for the Zybo-Z7.
DDR part number: MT41K256M16 RE-125.
The PS UART1 is routed to the FTDI instead of the UART0 for the Pynq-Z2.
The Crystal oscillator has a frequency of 33.3333 MHz.
The Zybo-Z7/petalinux_bsp/hardware_project/zyboz7.tcl file was modified to considered the aforementioned. Also, the block diagram for the bsp is shown in bd_layout.pdf (38.4 KB).
$ source /tools/Xilinx/Vitis/2020.2/settings.sh
$ source ~/petalinux/2020.2/settings.sh
$ petalinux-util --webtalk off
Make sure that ~/PYNQ/boards/Zybo-Z7/Zybo-Z7.spec has the line BSP_Zybo-Z7 :=
$ cd ~/PYNQ/sdbuild
$ make bsp BOARDDIR=/home/user/PYNQ/boards BOARDS=“Zybo-Z7”
copy the bsp file from ~/PYNQ/sdbuild/output/bsp/Zybo-Z7/xilinx-zyboz7-2020.2.bsp to ~/PYNQ/boards/Zybo-Z7/. Thus, along the Zybo-Z7.spec.
Add the bsp to the Zybo-Z7.spec: BSP_Zybo := xilinx-zyboz7-2020.2.bsp.
2. Create the image (2h30 min approx.)
To make the port process simple, I deleted the logictools overlay and reduce the base overlay deleting the Arduino and Raspberry Pi peripherals. Also, I modified the Makefile inside the sdbuild folder to avoid compiling for all the boards (Pynq-Z1, Pynq-Z2, ZCU-104, sw_repo). The changes are after the Pynq repository is cloned in line 65 (you can check this changes in the file Makefile_sdbuild shared).
This changes also affect the ~/PYNQ/build.sh file.
The base overlay block diagram is shown in bd_layout.pdf (107.0 KB). Also the constraints file base.xdc was updated from the Zybo-Z7 master xdc.
The steps used were:
That’s it .
I know these instructions can be vague and lack of deep explanations. But my intention is to share the stages I followed, so you can adjust them to your own needs.
First thank you for showing such great example to this community.
Meantime, I would like to know if there is any issue or setting require on run the Makefile you modified?
It looks like extracting: sed -e '105,165d' $(BUILD_ROOT)/PYNQ/build.sh
Still running the entire sh script and ends up building all.
Thank you
Hi Brian, I hope you’re doing great :-). Issues could be present as each time you run the Makefile, git makes changes locally. To make sure the build.sh file is getting modified, you should check the ~/PYNQ/sdbuild/build/ directory and search for the build.sh copied there. Lines after the 105 are not needed (since they are forcing the Pynq repo to be cloned again for the Pynq-Z2 and compile the original overlays). One workaround could be to just delete those lines by hand.
I’m sorry I can’t guarantee the Makefile given will work as it is, because among tests I loss track of the changes made to my local copy of the PYNQ repository .
However, I’m sure you could get it working following the aforementioned Please, let me know as soon as you get it.
Hello Dorfell and Thank you for sharing your work here. I almost managed to rebuilt the Image completely Thanks to you! Actually I rebuilt it… but I have a problem with the ethernet: No IP adress at boot on eth0.
I tried this:
$ ifup eth0
Internet Systems Consortium DHCP Client 4.4.1
Copyright 2004-2018 Internet Systems Consortium.
All rights reserved.
For info, please visit ISC DHCP - ISC
Listening on LPF/eth0/00:18:3e:03:dc:9e
Sending on LPF/eth0/00:18:3e:03:dc:9e
Sending on Socket/fallback
DHCPDISCOVER on eth0 to 255.255.255.255 port 67 interval 3 (xid=0xa68db745)
DHCPDISCOVER on eth0 to 255.255.255.255 port 67 interval 4 (xid=0xa68db745)
DHCPDISCOVER on eth0 to 255.255.255.255 port 67 interval 4 (xid=0xa68db745)
No DHCPOFFERS received.
No working leases in persistent database - sleeping.
At least it explains why I can’t connect through ethernet but I have no idea how to solve this
So here is my question : did you made any changes in the device tree or something to have a proper eth0 interface?
Hi Lenny, ¡that’s sounds great !!!. To answer your question, I didn’t modify any device tree files. Actually the file located in petalinux_bsp/meta-user/recipes-bsp/device-tree/files/system-user.dtsi is the same from the Pynq-Z2 example. However, it is important to make sure the Ethernet package is added in the ZyboZ7.spec file. For instance, I have this line STAGE4_PACKAGES_Zybo-Z7 := xrt pynq boot_leds ethernet pynq_peripherals. On the other hand, I used the Ethernet ports from the router of my internet service provider, which I have previously tested with a Linux laptop to verify it was working okay.
I hope you can find out a solution. The image shared in the post is also for the Zybo-Z7-20, maybe you can check if that image works on your board to discard external problems ?
Regards
Hi Lenny, I forgot to ask you if you had checked the IP showed in your message (i.e. inet 192.168.2.99).
This because the IP is dynamically assigned according to your router demand. In addition, as far I remember, I didn’t configure the static IP for this Pynq image, although according to the documentation, this is possible.
Have a nice day
@dorfell
Thanks for your sharing.
I’m interesting about the step you mention:
$ make bsp BOARDDIR=/home/user/PYNQ/boards BOARDS=“Zybo-Z7”
copy the bsp file from ~/PYNQ/sdbuild/output/bsp/Zybo-Z7/xilinx-zyboz7-2020.2.bsp to ~/PYNQ/boards/Zybo-Z7/. Thus, along the Zybo-Z7.spec.
Add the bsp to the Zybo-Z7.spec: BSP_Zybo := xilinx-zyboz7-2020.2.bsp.
Does this step should be skipped.
I check the RreadMe, if keep the BSP_Zybo can be empty because make will search the petalinux_bsp folder and trying to build the xsa and BSP directly.
Hello Dorfell, thank you sooo much for sharing your work here. I am using a Zybo-Z7-20 and I would like to run tensorflow code on Zybo so I think I can use the image which you put on the google drive directly.
What I did:
copy the image to SD card and insert it into zybo
connect Zybo to my computer via micro USB cable
My problem:
No “ttyusb0” show up in the /dev, I tap “sudo dmesg | grep tty” and nothing’s new no matter i turn on or off the Zybo via the switch. So I can’t establish communication using UART.
Do you have any idea how to fix it or whether I missed some steps?
Thank you
Hi Yongtao, I’m sorry for my late reply. After reading about your problem, some naive questions arise:
Is board JP5 in the SD card position?
Is LD12 (a.k.a Done) turn on after several seconds?
What’s your output for ls /dev?. The Zybo could appear as ttyUSB0, ttyUSB1, ttyUSB2, etc.
Besides, I’m using cutecom because it lists the uart devices available. A part from dmesg what are you using?
Let me know if you have any update,
Best wishes,
Dorfell
Hello Dorfell!
Thank you for responding me I kinda forgot to answer you however! I managed to make ethernet work properly. It was not a device-tree issue but a problem of setup on my side ^^'. Connect to a DHCP server, it will work better!
If some people have troubles building it here are the additional fixes I made to dorfell’s project:
I changed the build.sh deleting all lines after line 102.
In the Makefile I added some lines in order to delete completely all default boards folders and copy my customized build.sh, after git checkout (line 68):
I have to warn you that the image you uploaded did not work for me (corrupted or something because failed to flash the SDCard), it is the reason why I tried to build it myself!
Thank you again for sharing your work, it really helped me out a LOT!!
Hello, I know this post is rather old, but I used it to build Pynq 3.0.1 for Zybo-Z7-20.
The build process worked and Zybo successfully boots up, the Jupyter server works, etc. Although the DONE LED doesn’t turn on at boot, so I suspect the base.bit bitstream is not getting flashed in the PL. Have you experienced the same thing? Also, I tried a few examples and I’m getting Pynq overlay errors.
Thank you for your work and sharing it too, it has been a great help.
Hello Gabriel. I am glad it was helpful. I remember simplifying the base overlay (using only AXI GPIOs) and updating the *.xcf file. The PL was programmed, and I could use the IP cores from the Jupyter server. My humble suggestion is to start with a minimal base overlay, and once it works, add only the cores needed.
Thank you dorfell for such great tutorial, it was really useful for porting PYNQ to old Zybo. Sorry for touching such old thread, here is my implementation with build instructions: GitHub - nick-petrovsky/PYNQ-ZYBO: PYNQ for Zybo board