Hello, I want to use axi interface in PYNQ.So I created an axi master IP with HLS examle project.
I use that IP on vivado, and I find I can’t Creat HDL wrapper, there is an error: [BD 41-758] The following clock pins are not connected to a valid clock source: /processing_system7_0/M_AXI_GP0_ACLK
I don’t how to deal with it. I choose or not choose HP0 or GP0, It does’t work.
Is anyone know how to deal with it? I want to test it n PYNQ, hope it could be successfully.
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The pin M_AXI_GP0_ACLK in the ZYNQ7 PS is disconnected, you either connect the pin to a clock or disable the GP0
Mario
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