Hello, I want to use axi interface in PYNQ.So I created an axi master IP with HLS examle project. I use that IP on vivado, and I find I can’t Creat HDL wrapper, there is an error: [BD 41-758] The following clock pins are not connected to a valid clock source: /processing_system7_0/M_AXI_GP0_ACLK I…

How to use axi interface created by HLS correctly?

marioruiz January 17, 2021, 7:51pm 2

The pin M_AXI_GP0_ACLK in the ZYNQ7 PS is disconnected, you either connect the pin to a clock or disable the GP0

Mario

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