Hi, I’m using pynq version v3.1.1 on the RFSoC 4x2 board attempting to simply transmit a sinusoidal wave at 100 MHz.
My general process has been to design a block diagram with the DMA streaming from memory to an AXI4-Stream FIFO which feeds the DAC A via the RFDC IP block. We have the DAC outputting directly to a 100 MHz scope to observe what is being transmitted.
My thought process is that with the DAC configured to 4 Gsamps/s and interpolation at 1x with 250 MHz AXI beats of 256 wide (16 samples per axi4 stream clock cycle), I should be able to transmit a range of desired frequency tones one at a time based on how I configure my memory that is being transmitted by the DMA.
For instance, with these settings, creating a 100 MHz tone could be done by setting a sine wave of an arbitrary number of total samples of 16 bits with each cycle of the sine wave being 40 samples per cycle. However, on the scope, we consistently measure a period that corresponds to a frequency that is nearly exactly 8 times lower than what we expect, in this case 80 ns for a freq of 12.5 MHz. This across a variety of sample per cycle values.
We are wondering where this factor of 8 is coming from. Note that we also observe a factor of 4 lower in frequency than the set NCO mixer frequency when streaming complex to real and simply passing the same constant value to the mixer on I and Q for every beat.
I’ve attached the block diagram, as well as the python code used to generate the wave and send it as well as the configuration of the DAC within the RFDC IP. Also a picture of the scope output when we expected I believe 100 MHz but got 12.5 MHz (80 ns period). Thanks in advance for any help.
DAC_pynq2.zip (2.2 MB)