I am trying to use PLL of RFDC in RFSoC4x2 board. In my design, I try to capture RF data from
both channels of ADC0 Tile 224 (ADC C & ADC D in RFSoC 4x2 reference manual). Clock configuration for RFDC is given below:
Before adding PLL to design, I was able to capture data without any issues. When PLL is added to design, my RFDC can’t startup. When I try to startup or reset I get the following error : "RuntimeError: Function XRFDC_StartUP call failed stdout: metal: error: ADC 0 timed out at state 7 in XRFdc_WaitForRestartClr"
I couldn’t find what exactly state 7 means. If you could help me with this issue and point to documentation about state errors, I would be grateful.
I’m getting the same error. I guess it’s due to the reference clock in IP configuration not matching the lmk and lmx clocks on the board. By default they are set by xrfclk.set_ref_clks(lmk_freq=245.76, lmx_freq=491.52). One needs to change this using a tool provided by TI, as stated in the RFSoC4x2 reference manual.
I set the reference clock to 409.6MHz, and used xrfclk.set_ref_clks(lmk_freq=245.76, lmx_freq=409.6), and now it works.
The point is to make sure the LMX clock is the same as the reference clock in the IP configuration for the RFDC. Otherwise, the rfdc.adc_tiles[0].StartUp() command would fail because you are basically providing wrong clocks to the rfdc (I guess).
However, if you want a clock frequency which is a multiple of 1000 (say, 300MHz, as in your design) rather than a multiple of 1024 (say, 491.52MHz or 409.6MHz), then you might consider using the register file provided here, which set both LMK and LMX clock to 500MHz. If 500MHz is not an option for your reference clock in the IP config, then you might have to design your own register file using the TICSPRO software, which I failed because I don’t know much about the LMK and LMX chips.
