Hi, I’m attempting to complete partial reconfiguration using Jupyter notebooks. When I read the documentation , it says to users have to set the partial region for the overlay before they can reconfigure it overlay.set_partial_region('block_0') After the partial region is set, users can use the…

Checking back to see if anyone has some insight. After looking around some more it seems Xilinx offers some DFX IPs which should aid in triggering scheduled reconfiguration for runtime, but I’m still interested in doing this via jupyter note books at the moment. Any ideas?

@rock Sorry to bug. I’ve been trying to solve this issue and I’m pretty lost. Any suggestion on triggering PR via jupyter notebooks? The documentation seems to have some holes

Hi, Have you tried with pr_download? Xilinx/PYNQ/blob/master/pynq/overlay.py#L425 if enable: Clocks.set_pl_clk(i, div0, div1) else: Clocks.set_pl_clk(i) s…

So I did try this method but I think I am unable to mark partial regions for Pynq as my PR regions are not in my block diagram. Currently these blocks are outside of the block diagram and connected with a top wrapper. [image] [image] The block in red is what I would like to become PR. I think I’…

I believe this is not supported, since pynq is expecting the PR regions to be part of the hierarchy in the IP Integrator.

[image] marioruiz: ve this is not supported, since pynq is expecting the PR regions to be part of the hierarchy in the IP Integrator. See, this PR region in the IP integrator region is my issue. When I define a module as a reconfigurable partition, I am no longer able to drag it to the block …

[image] Dma channel not started when partial reconfig Support Hi @rock , Thanks for your reply. You are right. Based on my experiment, PR decoupler is a must when performing partial reconfig. [image] Big thanks for your reminder. The PR ip shown in this comment,…

Hi, Once you have a hierarchy in your block design, right click on it and select Create Partition Definition after that you can add reconfigurable modules to it. For further questions about DFX (partial reconfiguration) I suggest Xilinx forums. Mario

I suggest you watch these tutorials on Xilinx DFX, they may help: [Dynamic Function Exchange with ZYNQ Ultracale+ : Part 1: Introduction]

Triggering Partial Reconfiguration with Jupyter Notebook

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monkeyboyfr3sh February 9, 2021, 10:06pm 8

The PR ip shown in this comment, how do I create this? I’m pretty sure if I could get this in the design then it would be exposed for pynq to be a partial region.

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Triggering Partial Reconfiguration with Jupyter Notebook

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