I want to implement a hardware design for gaussian elimination over GF(2) in PYNQ-Z2, which is published by this research: https://ieeexplore.ieee.org/document/7857188. The source code is written in Verilog and is available via the link in the paper.
I successfully ran the testbench, and then i created an IP using “Create and Package New IP” and followed the tutorial (https://www.youtube.com/watch?v=mkUhYrmlX0k) to create an overlay and import it into jupyter notebook on the board.
I have no problem generating the bitstream and .hwh files, however, when i try to look at the overlay in jupyter notebook, it shows that the IP Block is None:
I notice that when i click “Validate Design”, it showed me a warning that one of the input pins is not connected. I am not sure whether this warning causes the problem.
Anyone has ideas on what’s wrong here? Thanks.